By Vijay Madisetti, Chonlameth Arpnikanondt
The platform-centric SoC process is geared toward the layout of today’s SoC structures with emphasis on real-time, embedded structures. The strategy presents a tenet and an SoC layout setting that promotes an integration of cutting-edge instruments and strategies helpful for the improvement of the structures. It renders a brand new and higher point of view in the direction of co-design ways, whereas additionally elevating a degree of layout abstraction. as the configurable platform gadgets are designed off-cycle, they give a contribution to a basic development in improvement time. through incorporating their utilization, the final approach moves a stability among overall layout flexibility and minimum time-to-market.
In bankruptcy 1, demanding situations within the co-design of SoCs are brought. The bankruptcy in short describes the technical demanding situations dealing with process builders and introduces a proposed technique to the matter. the rest of this booklet provides a extra thorough exam at the challenge and the proposed approach.
Chapter 2 describes the proposed platform-centric SoC layout strategy intimately. It illustrates the layout circulation and discusses every one major step within the layout procedure. Definition of a platform as initially outlined by means of Sabbagh , in addition to the platform-based and platform-centric layout techniques, are offered. The bankruptcy concludes by means of evaluating the proposed procedure with prior comparable work.
Chapter three lays out the technological historical past for the proposed SoC layout procedure. while the platform know-how is mentioned in bankruptcy 2, this bankruptcy offers an summary of the opposite basic applied sciences: the Unified Modeling Language (UML) and the Extensible Markup Language (XML). The bankruptcy starts off with an advent to UML as a modeling device rather well perceived in the software program engineering neighborhood. it truly is through a dialogue on an try through the item administration workforce (OMG) to empower UML for the improvement of real-time embedded software program – an attempt on the way to ultimately culminate in a layout framework referred to as the UML Profile for Schedulability, functionality, and Time Specification . Thereafter, an summary of XML and some different similar net applied sciences ensue.
Chapter four outlines the constitution of the library of platform items (LPO), in addition to furnishes a entire instruction and specifications specification platform item needs to own so that it will be scalable and suitable with the proposed method. crucial components for every platform item, e.g. structure blueprint, XML-based self-described modules, platform handling software, etc., also are mentioned intimately.
Chapter five presents a close therapy of UML extensions for the improvement of real-time embedded structures. The bankruptcy starts off with a format of the Co-design Modeling Framework (CMF) hierarchy that encompasses 5 different sub-profiles – the time-honored application profile (PCUprofile), the Exception Modeling profile (EMprofile), the Interrupt Modeling profile (IMprofile), the Synthesizable Description Language profile (SHDLprofile), and the structure Blueprint profile (ABprofile). each one of those profiles furnishes a layout framework that's in particular adapted for the proposed strategy, and will have the ability to meet with the demanding situations posed by way of the layout and try out of real-time embedded SoC-based structures. The bankruptcy, then, proceeds to debate the area thought for every sub-profile, by means of the outline of the corresponding stereotypes.
Chapter 6 applies the platform-centric SoC layout technique, utilizing the CMF profile in UML, to the improvement of a simplified camera approach so that it will reveal the use and the robustness of the proposed procedure. in particular, the NiOS improvement board is used to imitate the digicam procedure the place uncooked snapshot information are learn from a charge-coupled machine (CCD), after which JPEG encoded and kept into reminiscence. The bankruptcy starts off with an outline of the Altera’s NiOS method, by means of the particular procedure improvement strategy that explicitly demonstrates using the proposed method. A quantitative evaluate is then offered that compares the advance price of the proposed platform-centric SoC layout procedure opposed to a few replacement techniques utilizing expense estimation types and tools.
Chapter 7 concludes the booklet with a precis and a dialogue of destiny instructions for this attempt on platform-based layout.
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Additional resources for A Platform-Centric Approach to System-on-Chip (SOC) Design
Chapter 4 outlines the structure of the library of platform objects (LPO), as well as furnishes a comprehensive guideline and requirements specification that a platform object must possess in order to be scalable and compatible with the proposed approach. , are also discussed in detail. Chapter 5 provides a detailed treatment of UML extensions for the development of real-time embedded systems. The chapter starts with a layout of the Co-design Modeling Framework (CMF) hierarchy that encompasses five other sub-profiles—the generic utility profile (PCUprofile) the Exception Modeling profile (EMprofile), the Interrupt Modeling profile (IMprofile), the Synthesizable Hardware Description Language profile (SHDLprofile), and the Architecture Blueprint profile (ABprofile).
Mathew  describes a UML model as the basic unit of development which is highly self-consistent and loosely coupled with other models by navigation channels. A model is not directly visible to users. It captures the underlying semantics of a problem, and contains data accessed by tools to facilitate information exchange, code generation, navigation, etc. UML models are represented graphically. Many different perspectives can be constructed for a model—each shows all or part of the model and is portrayed by one or more diagrams.
Although the current results claim to be two to three orders of magnitude more efficient in power and area than architectures based on software processors, the chip-in-a-day approach finds its limitations in the following: It still cannot improve upon the execution time. It remains to be seen if this approach can support a much more complex real-time embedded SoC design. 4 OTHER EMBEDDED DESIGN APPROACHES USING UML The platform-based design concept  upon which the chip-in-a-day approach is based also spawns an inception of the proposal for the Embedded UML profile  whose objective is to merge real-time UML and HW/SW co-design together.